Items where Author is "Nagaraju, B."

Kumar, J. Vijay and Nagaraju, B. (2023) Design and Development of CPLD Based on Low Power Pipelined 64-bit RISC Processor with Unbiased Floating Point Unit. In: Theory and Applications of Engineering Research Vol. 1. B P International, pp. 74-84. ISBN 978-81-967636-2-6